1. Field of the Invention
The present invention relates to a digital-to-analog converter (hereinafter also referred to as a D/A converter) that operates segmentwise.
2. Description of the Prior Art
Some conventional D/A converters have been known as "segmentwise operating D/A converters". When processing input digital data including n bits, D/A converters of this type divide the digital data into two segments (groups), that is, into the upper bits (MSB) and the lower bits (LSB), then subject each segment to D/A conversion, and finally add up the outputs of D/A conversion of each segment.
However, D/A converters of this type have the following shortcoming. FIG. 1 shows the input/output characteristic of such a D/A converter, with the value of input digital data taken along the horizontal axis and the output voltage (analog voltage) taken along the vertical axis. As seen from this figure, conventional segmentwise operating D/A converters suffer from abrupt rising changes in their output voltage at some points, such as the points 52, 53, and 54 in FIG. 1, within their conversion range. Such abrupt rising changes in the output voltage occur when the lower bits change (at the points 52, 53, and 54) from the state in which all the bits are "1" to the state in which all the bits are "0" due to increment of the input digital data. Because of such abrupt rising changes, a control device employing a D/A converter of this type cannot achieve proper control when a voltage that exists within the range of such abrupt changes is targeted as the voltage expected from the D/A converter. To minimize such changes, the D/A converter needs to be composed of high-precision circuits, and this has been making the D/A converter (and thus the control device employing it) more expensive to produce. Abrupt rising changes as described above in the output voltage at the points 52, 53, and 54 (the points 52, 53, and 54 are generally called the segment switching points) occur mainly because the full-scale value Vd of the D/A conversion circuit for the lower-bits segment is determined such that this full-scale value Vd, when incremented by one LSB, equals the full-scale value Vu of the D/A converting circuit for the upper-bits segment divided by 2.sup.N (N represents the number of the upper bits). That is, Vd=(Vu/2.sup.N)-1LSB.